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Re: Syncing CPU caches from userland on MIPS

To: Arnaud Patard <>
Subject: Re: Syncing CPU caches from userland on MIPS
From: Florian Lohoff <>
Date: Wed, 25 Nov 2009 15:32:32 +0100
Cc: Aurelien Jarno <>,
In-reply-to: <>
Organization: rfc822 - pure communication
Original-recipient: rfc822;
References: <> <> <>
User-agent: Mutt/1.5.18 (2008-05-17)
On Wed, Nov 25, 2009 at 03:39:01PM +0100, Arnaud Patard wrote:
> > Would this only evict stuff from the ICACHE? When trying to execute
> > a just written buffer and with a writeback DCACHE you would need to 
> > explicitly writeback the DCACHE to memory and invalidate the ICACHE.
> we already though about using BCACHE instead of ICACHE only but it
> didn't make any difference. the bug is still there.

My understanding is you need both ...

FLUSH/WRITEBACK the dcache and INVALIDATE the icache - the icache needs
to load the data which is in the dcache via memory.

Florian Lohoff                               
"Es ist ein grobes Missverständnis und eine Fehlwahrnehmung, dem Staat
im Internet Zensur- und Überwachungsabsichten zu unterstellen."
- - Bundesminister Dr. Wolfgang Schäuble -- 10. Juli in Berlin 

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