linux-mips
[Top] [All Lists]

Re: Syncing CPU caches from userland on MIPS

To: Arnaud Patard <arnaud.patard@rtp-net.org>
Subject: Re: Syncing CPU caches from userland on MIPS
From: Florian Lohoff <flo@rfc822.org>
Date: Wed, 25 Nov 2009 15:32:32 +0100
Cc: Aurelien Jarno <aurelien@aurel32.net>, linux-mips@linux-mips.org
In-reply-to: <87pr76acu2.fsf@lechat.rtp-net.org>
Organization: rfc822 - pure communication
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20091124182841.GE17477@hall.aurel32.net> <20091125140105.GB13938@paradigm.rfc822.org> <87pr76acu2.fsf@lechat.rtp-net.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.18 (2008-05-17)
On Wed, Nov 25, 2009 at 03:39:01PM +0100, Arnaud Patard wrote:
> > Would this only evict stuff from the ICACHE? When trying to execute
> > a just written buffer and with a writeback DCACHE you would need to 
> > explicitly writeback the DCACHE to memory and invalidate the ICACHE.
> 
> we already though about using BCACHE instead of ICACHE only but it
> didn't make any difference. the bug is still there.

My understanding is you need both ...

FLUSH/WRITEBACK the dcache and INVALIDATE the icache - the icache needs
to load the data which is in the dcache via memory.

Flo
-- 
Florian Lohoff                                         flo@rfc822.org
"Es ist ein grobes Missverständnis und eine Fehlwahrnehmung, dem Staat
im Internet Zensur- und Überwachungsabsichten zu unterstellen."
- - Bundesminister Dr. Wolfgang Schäuble -- 10. Juli in Berlin 

Attachment: signature.asc
Description: Digital signature

<Prev in Thread] Current Thread [Next in Thread>