| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: why it not write those 6bits to entrylo0/1 register? |
| From: | figo zhang <figo1802@gmail.com> |
| Date: | Wed, 25 Nov 2009 14:52:51 +0800 |
| Cc: | linux-mips@linux-mips.org |
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| In-reply-to: | <20091117084047.GA2923@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <c6ed1ac50911170012u7a52fbb9h1ae62cabf766122f@mail.gmail.com> <20091117084047.GA2923@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
yes, i know why shout shift this 6 bits, see this : entrylo[01]: 3130 29 6 5 3 2 1 0 ------------------------------------------- | | PFN | C |D|V|G| ------------------------------------------- linux pte: 31 12 111098 7 6 5 3 2 1 0 ------------------------------------------- | PFN | C |D|V|G|B|M|A|W|R|P| ------------------------------------------- so , the linux PTE has the least significant 6 bits is mantain by linux PTE, the hardware PTE entrylo[0~1] have no such bits, so it need to shift . ralf, is some description on the kernel code? if it has, it would be easy understand .
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