Re: why it not write those 6bits to entrylo0/1 register?

[Ralf Baechle <ralf@linux-mips.org>]

On Tue, Nov 17, 2009 at 05:37:25PM +0800, figo zhang wrote:

> > > so, if i set a page attrubite is PAGE_READONLY, this attribute will set
> > to
> > > pte , right? so ,
> > > why it should shift 6 bits?
> >
> 
> Thanks a lot. I am puzzle that  if i set a page attrubite is PAGE_READONLY,
> tlb_write_indexed()
> will write the 6 bits to entrylo0 register? i am using 24KEC soc.

Yes, tlb_write_indexed() does that.  Equally tlb_write_random() writes a
TLB entry into the TLB.  Basically we use tlb_write_indexed() to overwrite
and update an existing TLB entry.  But if there is no TLB entry yet then
we just use tlb_write_random() an allow the CPU to pick an arbitrary entry.

  Ralf