On Mon, Nov 16, 2009 at 06:12:22PM +0100, Takashi Iwai wrote:
> Actually, this has been a looong-standing problem.
> I have a series of patches to fix these issues, but it's more
> intensively involved with dma_*() functions.
> The patches can be found in test/dma-fix branch of sound GIT tree.
> This basically adds dma_mmap_coherent() function to feasible
> architectures, which is already implemented for ARM, so far.
Cool - but needs a little further tweaking to work right. That's a
solution which will use uncached accesses on all MIPS systems.
IP27/IP35-family machines will explode when you try that. Eventually the
cache coherency logic will notice that cache, directory caches and memory
have become inconsistent and bombard the CPU with a bunch of nasty
For cache-coherent machines otoh it's a big waste of performance.
int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t handle, size_t size)
struct page *pg;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
cpu_addr = (void *)dma_addr_to_virt(handle);
pg = virt_to_page(cpu_addr);
return remap_pfn_range(vma, vma->vm_start,
page_to_pfn(pg) + vma->vm_pgoff,
Thomas - you're the IP28 specialist. Would the plat_device_is_coherent()
above have to become a cpu_is_noncoherent_r10000() call? Any further