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Re: [PATCH v7 04/17] tracing: add static function tracer support for MIP

To: Wu Zhangjin <wuzhangjin@gmail.com>
Subject: Re: [PATCH v7 04/17] tracing: add static function tracer support for MIPS
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Wed, 11 Nov 2009 14:18:15 +0000 (GMT)
Cc: David Daney <ddaney@caviumnetworks.com>, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, zhangfx@lemote.com, zhouqg@gmail.com, Ralf Baechle <ralf@linux-mips.org>, rostedt@goodmis.org, Frederic Weisbecker <fweisbec@gmail.com>, Ingo Molnar <mingo@elte.hu>, Nicholas Mc Guire <der.herr@hofr.at>, Richard Sandiford <rdsandiford@googlemail.com>, Patrik Kluba <kpajko79@gmail.com>, Thomas Gleixner <tglx@linutronix.de>, Michal Simek <monstr@monstr.eu>
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On Wed, 11 Nov 2009, Wu Zhangjin wrote:

> >  No, register jumps cannot be predicted -- this is where the performance 
> > goes on any serious processor -- the two extra instructions are nothing 
> > compared to that.  OTOH frame pointer calculations are pure arithmetic, so 
> > you only lose time incurred by the instructions themselves.
> 
> Yes, I only mean the -mlong-calls and the original -mno-long-calls with
> -pg.
> 
> The orignal one looks like this:
> 
> move ra, at
> jal _mcount
> 
> The new one with -mlong-calls looks like this:
> 
> lui v1, HI_16BIT_OF_MCOUNT
> addiu v1, v1, LOW_16BIT_OF_MCOUNT
> move ra, at
> jalr v1
> 
> both of them have a "jump" instruciton, so, only two lui, addiu added
> for -mlong-calls ;)
> 
> what about the difference between that "jal _mcount"  and "jalr v1"?

 As I say, the latter cannot be predicted and will incur a stall for any 
decent pipeline.  With the former the target address of the jump can be 
calculated early and the instruction fetch unit can start feeding 
instructions from there into the pipeline even before the jump has reached 
the execution stage.

  Maciej

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