| To: | David Daney <ddaney@caviumnetworks.com> |
|---|---|
| Subject: | Re: [PATCH] MIPS: Octeon: Use lockless interrupt controller operations when possible. |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 13 Oct 2009 21:41:55 +0200 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <1255458363-8987-1-git-send-email-ddaney@caviumnetworks.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20091013162018.GB27508@linux-mips.org> <1255458363-8987-1-git-send-email-ddaney@caviumnetworks.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.19 (2009-01-05) |
On Tue, Oct 13, 2009 at 11:26:03AM -0700, David Daney wrote: > Some newer Octeon chips have registers that allow lockless operation > of the interrupt controller. Take advantage of them. Thanks, applied. Ralf |
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