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Re: [PATCH] Avoid potential hazard on Context register

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] Avoid potential hazard on Context register
From: Chris Dearman <chris@mips.com>
Date: Sun, 11 Oct 2009 13:26:58 -0700
Cc: linux-mips <linux-mips@linux-mips.org>
In-reply-to: <20091011145330.GA23369@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <4AD17619.1000201@mips.com> <20091011133912.GA15684@linux-mips.org> <20091011145330.GA23369@linux-mips.org>
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Ralf Baechle wrote:
There is no hazard barrier between writes to c0_context and subsequent
read accesses.  This is a fairly theoretical hole as c0_context is only
written on CPU bootup and other, unrelated code will almost certainly
It was actually in the bootup code where I saw the problem, and this patch doesn't deal with that case:

MTC0 zero, CP0_CONTEXT # clear context register PTR_LA $28, init_thread_union /* Set the SP after an empty pt_regs. */ PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE PTR_ADDU sp, $28 back_to_back_c0_hazard set_saved_sp sp, t0, t1

The problem I observed is that the Context valuse used by set_saved_sp is whatever it inherits from YAMON.

Chris

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