| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | [PATCH 3/4] Alchemy: simple cpu subtype detector |
| From: | Manuel Lauss <manuel.lauss@googlemail.com> |
| Date: | Wed, 7 Oct 2009 20:15:14 +0200 |
| Cc: | Linux-MIPS <linux-mips@linux-mips.org>, Manuel Lauss <manuel.lauss@gmail.com> |
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| In-reply-to: | <1254939315-8158-3-git-send-email-manuel.lauss@gmail.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1254939315-8158-1-git-send-email-manuel.lauss@gmail.com> <1254939315-8158-2-git-send-email-manuel.lauss@gmail.com> <1254939315-8158-3-git-send-email-manuel.lauss@gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
extract the alchemy chip variant from c0_prid register.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/include/asm/mach-au1x00/au1000.h | 30 ++++++++++++++++++++++++++++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h
b/arch/mips/include/asm/mach-au1x00/au1000.h
index fceeca8..9174285 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -130,6 +130,36 @@ static inline int au1xxx_cpu_needs_config_od(void)
return 0;
}
+#define ALCHEMY_CPU_UNKNOWN -1
+#define ALCHEMY_CPU_AU1000 0
+#define ALCHEMY_CPU_AU1500 1
+#define ALCHEMY_CPU_AU1100 2
+#define ALCHEMY_CPU_AU1550 3
+#define ALCHEMY_CPU_AU1200 4
+
+static inline int alchemy_get_cputype(void)
+{
+ switch (read_c0_prid() & 0xffff0000) {
+ case 0x00030000:
+ return ALCHEMY_CPU_AU1000;
+ break;
+ case 0x01030000:
+ return ALCHEMY_CPU_AU1500;
+ break;
+ case 0x02030000:
+ return ALCHEMY_CPU_AU1100;
+ break;
+ case 0x03030000:
+ return ALCHEMY_CPU_AU1550;
+ break;
+ case 0x04030000:
+ return ALCHEMY_CPU_AU1200;
+ break;
+ }
+
+ return ALCHEMY_CPU_UNKNOWN;
+}
+
/* arch/mips/au1000/common/clocks.c */
extern void set_au1x00_speed(unsigned int new_freq);
extern unsigned int get_au1x00_speed(void);
--
1.6.5.rc2
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