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[PATCH] MIPS: Octeon: Check all CCAs in cvmx_write_csr.

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH] MIPS: Octeon: Check all CCAs in cvmx_write_csr.
From: David Daney <ddaney@caviumnetworks.com>
Date: Thu, 20 Aug 2009 12:35:53 -0700
Cc: David Daney <ddaney@caviumnetworks.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
The current code only checks CCA of 0 when deciding if a dummy read is
needed.  Since the kernel can (and does) use other CCAs we need to
mask out the CCA bits from the address.  Since the address constant
now fits in 16 bits, there is an added benefit that smaller code is
generated.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/include/asm/octeon/cvmx.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/octeon/cvmx.h 
b/arch/mips/include/asm/octeon/cvmx.h
index e31e3fe..9d9381e 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -271,7 +271,7 @@ static inline void cvmx_write_csr(uint64_t csr_addr, 
uint64_t val)
         * what RSL read we do, so we choose CVMX_MIO_BOOT_BIST_STAT
         * because it is fast and harmless.
         */
-       if ((csr_addr >> 40) == (0x800118))
+       if (((csr_addr >> 40) & 0x7ffff) == (0x118))
                cvmx_read64(CVMX_MIO_BOOT_BIST_STAT);
 }
 
-- 
1.6.0.6


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