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[PATCH 2/2] MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP build

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH 2/2] MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
From: David Daney <ddaney@caviumnetworks.com>
Date: Mon, 13 Jul 2009 11:15:20 -0700
Cc: David Daney <ddaney@caviumnetworks.com>
In-reply-to: <1247508920-29153-1-git-send-email-ddaney@caviumnetworks.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1247508920-29153-1-git-send-email-ddaney@caviumnetworks.com>
Sender: linux-mips-bounce@linux-mips.org
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 .../asm/mach-cavium-octeon/cpu-feature-overrides.h |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h 
b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index 3d83075..425e708 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -31,12 +31,16 @@
 #define cpu_has_cache_cdex_s   0
 #define cpu_has_prefetch       1
 
+#define cpu_has_llsc           1
 /*
- * We should disable LL/SC on non SMP systems as it is faster to
- * disable interrupts for atomic access than a LL/SC.  Unfortunatly we
- * cannot as this breaks asm/futex.h
+ * We Disable LL/SC on non SMP systems as it is faster to disable
+ * interrupts for atomic access than a LL/SC.
  */
-#define cpu_has_llsc           1
+#ifdef CONFIG_SMP
+# define kernel_uses_llsc      1
+#else
+# define kernel_uses_llsc      0
+#endif
 #define cpu_has_vtag_icache    1
 #define cpu_has_dc_aliases     0
 #define cpu_has_ic_fills_f_dc  0
-- 
1.6.0.6


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