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[PATCH] [MTI] MIPS secondary cache supports 64 byte line size.

To: linux-mips@linux-mips.org
Subject: [PATCH] [MTI] MIPS secondary cache supports 64 byte line size.
From: Raghu Gandham <raghu@mips.com>
Date: Fri, 10 Jul 2009 01:55:22 -0700
Cc: raghu@mips.com, chris@mips.com
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
User-agent: StGIT/0.14.3
From: Chris Dearman <chris@mips.com>

Signed-off-by: Chris Dearman <chris@mips.com>
---

 arch/mips/Kconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3ca0fe1..0a3a424 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1012,6 +1012,7 @@ config MIPS_L1_CACHE_SHIFT
        int
        default "4" if MACH_DECSTATION || MIKROTIK_RB532
        default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || 
CPU_CAVIUM_OCTEON
+       default "6" if MIPS_CPU_SCACHE
        default "4" if PMC_MSP4200_EVAL
        default "5"
 


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