[PATCH 15/15] Do not rely on the initial state of TC/VPE bindings when doing cross VPE writes

[Raghu Gandham <raghu@mips.com>]

From: Kurt Martin <kurt@mips.com>

Signed-off-by: Jaidev Patwardhan <jaidev@mips.com>
        Signed-off-by: Chris Dearman <chris@mips.com>
---

 arch/mips/kernel/smtc.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 69240c4..3498b82 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -481,6 +481,18 @@ void smtc_prepare_cpus(int cpus)
                         */
                        if (tc != 0) {
                                smtc_tc_setup(vpe, tc, cpu);
+                               if (vpe != 0) {
+                                       /*
+                                        * Set MVP bit (possibly again).  Do it
+                                        * here to catch CPUs that have no TCs
+                                        * bound to the VPE at reset.  In that
+                                        * case, a TC must be bound to the VPE
+                                        * before we can set VPEControl[MVP]
+                                        */
+                                       write_vpe_c0_vpeconf0(
+                                               read_vpe_c0_vpeconf0() |
+                                               VPECONF0_MVP);
+                               }
                                cpu++;
                        }
                        printk(" %d", tc);