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[PATCH 12/15] Added coherentio command line option for DMA_NONCOHERENT k

To: linux-mips@linux-mips.org
Subject: [PATCH 12/15] Added coherentio command line option for DMA_NONCOHERENT kernel
From: Raghu Gandham <raghu@mips.com>
Date: Wed, 01 Jul 2009 19:42:45 -0700
Cc: chris@mips.com
In-reply-to: <20090702023938.23268.65453.stgit@linux-raghu>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20090702023938.23268.65453.stgit@linux-raghu>
Sender: linux-mips-bounce@linux-mips.org
User-agent: StGIT/0.14.3
From: Chris Dearman <chris@mips.com>

Signed-off-by: Chris Dearman (chris@mips.com)
---

 arch/mips/mti-malta/malta-setup.c |  100 +++++++++++++++++++++++++++++++++++++
 1 files changed, 100 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mti-malta/malta-setup.c 
b/arch/mips/mti-malta/malta-setup.c
index 69f5f9c..3f52c31 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -32,6 +32,7 @@
 #include <asm/mips-boards/maltaint.h>
 #include <asm/dma.h>
 #include <asm/traps.h>
+#include <asm/gcmpregs.h>
 #ifdef CONFIG_VT
 #include <linux/console.h>
 #endif
@@ -105,6 +106,103 @@ static void __init fd_activate(void)
 }
 #endif
 
+int coherentio = -1;
+static int __init setcoherentio(char *str)
+{
+       if (coherentio < 0)
+               pr_info("Command line checking done before"
+                               " plat_setup_iocoherency!!\n");
+       if (coherentio == 0)
+               pr_info("Command line enabling coherentio"
+                               " (this will break...)!!\n");
+
+       coherentio = 1;
+       pr_info("Hardware DMA cache coherency (command line)\n");
+       return 1;
+}
+__setup("coherentio", setcoherentio);
+
+static int __init setnocoherentio(char *str)
+{
+       if (coherentio < 0)
+               pr_info("Command line checking done before"
+                               " plat_setup_iocoherency!!\n");
+       if (coherentio == 1)
+               pr_info("Command line disabling coherentio\n");
+
+       coherentio = 0;
+       pr_info("Software DMA cache coherency (command line)\n");
+       return 1;
+}
+__setup("nocoherentio", setnocoherentio);
+
+static int __init
+plat_enable_iocoherency(void)
+{
+       int supported = 0;
+       if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
+               if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
+                       BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
+                       pr_info("Enabled Bonito CPU coherency\n");
+                       supported = 1;
+               }
+               if (strstr(prom_getcmdline(), "iobcuncached")) {
+                       BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
+                       BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
+                               ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+                                 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+                       pr_info("Disabled Bonito IOBC coherency\n");
+               } else {
+                       BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
+                       BONITO_PCIMEMBASECFG |=
+                               (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+                                BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+                       pr_info("Enabled Bonito IOBC coherency\n");
+               }
+       } else if (gcmp_niocu() != 0) {
+               /* Nothing special needs to be done to enable coherency */
+               pr_info("CMP IOCU detected\n");
+               if ((*(unsigned int *)0xbf403000 & 0x81) != 0x81) {
+                       pr_crit("IOCU OPERATION DISABLED BY SWITCH"
+                               " - DEFAULTING TO SW IO COHERENCY\n");
+                       return 0;
+               }
+               supported = 1;
+       }
+       return supported;
+}
+
+static void __init
+plat_setup_iocoherency(void)
+{
+#ifdef CONFIG_DMA_NONCOHERENT
+       /*
+        * Kernel has been configured with software coherency
+        * but we might choose to turn it off
+        */
+       if (plat_enable_iocoherency()) {
+               if (coherentio == 0)
+                       pr_info("Hardware DMA cache coherency supported"
+                                       " but disabled from command line\n");
+               else {
+                       coherentio = 1;
+                       printk(KERN_INFO "Hardware DMA cache coherency\n");
+               }
+       } else {
+               if (coherentio == 1)
+                       pr_info("Hardware DMA cache coherency not supported"
+                               " but enabled from command line\n");
+               else {
+                       coherentio = 0;
+                       pr_info("Software DMA cache coherency\n");
+               }
+       }
+#else
+       if (!plat_enable_iocoherency())
+               panic("Hardware DMA cache coherency not supported");
+#endif
+}
+
 #ifdef CONFIG_BLK_DEV_IDE
 static void __init pci_clock_check(void)
 {
@@ -207,6 +305,8 @@ void __init plat_mem_setup(void)
        if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO)
                bonito_quirks_setup();
 
+       plat_setup_iocoherency();
+
 #ifdef CONFIG_BLK_DEV_IDE
        pci_clock_check();
 #endif


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