[PATCH 05/15] [MTI] MIPS secondary cache supports 64 byte line size.

[Raghu Gandham <raghu@mips.com>]

From: Chris Dearman <chris@mips.com>

Signed-off-by: Chris Dearman <chris@mips.com>
---

 arch/mips/Kconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index df1a92a..60c7235 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1012,6 +1012,7 @@ config MIPS_L1_CACHE_SHIFT
        int
        default "4" if MACH_DECSTATION || MIKROTIK_RB532
        default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || 
CPU_CAVIUM_OCTEON
+       default "6" if MIPS_CPU_SCACHE
        default "4" if PMC_MSP4200_EVAL
        default "5"