| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | [PATCH 04/15] Fix accesses to device registers on MIPS boards |
| From: | Raghu Gandham <raghu@mips.com> |
| Date: | Wed, 01 Jul 2009 19:40:40 -0700 |
| Cc: | chris@mips.com |
| In-reply-to: | <20090702023938.23268.65453.stgit@linux-raghu> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20090702023938.23268.65453.stgit@linux-raghu> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | StGIT/0.14.3 |
From: Chris Dearman <chris@mips.com>
This fixes the remaining problems introduced by
f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length &
byteswapping in bigendian mode)
Signed-off-by: Chris Dearman (chris@mips.com)
---
arch/mips/mti-malta/malta-int.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index a8756f8..e9ba8b3 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -87,7 +87,7 @@ static inline int mips_pcibios_iack(void)
dummy = BONITO_PCIMAP_CFG;
iob(); /* sync */
- irq = readl((u32 *)_pcictrl_bonito_pcicfg);
+ irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg);
iob(); /* sync */
irq &= 0xff;
BONITO_PCIMAP_CFG = 0;
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