| To: | David Daney <ddaney@caviumnetworks.com> |
|---|---|
| Subject: | Re: [PATCH 0/2] Clean up CP0 hwrena code in traps.c |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 16 Jun 2009 11:31:37 +0100 |
| Cc: | linux-mips <linux-mips@linux-mips.org> |
| In-reply-to: | <4A0B5077.2010600@caviumnetworks.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <4A0B5077.2010600@caviumnetworks.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.18 (2008-05-17) |
On Wed, May 13, 2009 at 03:57:59PM -0700, David Daney wrote: > There is an ugly #ifdef CONFIG_CPU_CAVIUM_OCTEON in the middle of > traps.c. We can get rid of it if we add a cpu feature for > implementation dependent hwrena bits. The first patch adds the > feature macro and the second removes the #ifdef by setting the feature > for Octeon. I was wondering if maybe this should be a per-CPU thing but then again hitting such a highly assymetric system is unlikely even in the embedded world. Thanks, queued for 2.6.31, Ralf |
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