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[PATCH] Alchemy: get rid of allow_au1k_wait

To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: [PATCH] Alchemy: get rid of allow_au1k_wait
From: Manuel Lauss <mano@roarinelk.homelinux.net>
Date: Fri, 22 May 2009 22:24:18 +0200
Cc: Manuel Lauss <mano@roarinelk.homelinux.net>
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Eliminate the 'allow_au1k_wait' variable.  MIPS kernel installs the
Alchemy-specific wait code before timer initialization;  if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.

This also corrects the 'wait instruction available' output in cpuinfo.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
---
 arch/mips/alchemy/common/time.c |   14 ++++++++------
 arch/mips/kernel/cpu-probe.c    |   10 +++-------
 2 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 33fbae7..9fc0d44 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -36,14 +36,13 @@
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
 
+#include <asm/processor.h>
 #include <asm/time.h>
 #include <asm/mach-au1x00/au1000.h>
 
 /* 32kHz clock enabled and detected */
 #define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
 
-extern int allow_au1k_wait; /* default off for CP0 Counter */
-
 static cycle_t au1x_counter1_read(struct clocksource *cs)
 {
        return au_readl(SYS_RTCREAD);
@@ -153,13 +152,16 @@ void __init plat_time_init(void)
 
        printk(KERN_INFO "Alchemy clocksource installed\n");
 
-       /* can now use 'wait' */
-       allow_au1k_wait = 1;
        return;
 
 cntr_err:
-       /* counters unusable, use C0 counter */
+       /* MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
+        * function is called.  Because the Alchemy counters are unusable
+        * the C0 timekeeping code is installed and use of the 'wait'
+        * instruction must be prohibited, which is done most easily by
+        * assigning NULL to cpu_wait.
+        */
+       cpu_wait = NULL;
        r4k_clockevent_init();
        init_r4k_clocksource();
-       allow_au1k_wait = 0;
 }
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b13b8eb..262ea9c 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -91,15 +91,11 @@ static void rm7k_wait_irqoff(void)
 }
 
 /* The Au1xxx wait is available only if using 32khz counter or
- * external timer source, but specifically not CP0 Counter. */
-int allow_au1k_wait;
-
+ * external timer source, but specifically not CP0 Counter.
+ * alchemy/common/time.c may override cpu_wait!
+ */
 static void au1k_wait(void)
 {
-       if (!allow_au1k_wait)
-               return;
-
-       /* using the wait instruction makes CP0 counter unusable */
        __asm__("       .set    mips3                   \n"
                "       cache   0x14, 0(%0)             \n"
                "       cache   0x14, 32(%0)            \n"
-- 
1.6.3.1


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