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Re: Help getting IP30/Octane fixed?

To: Johannes Dickgreber <>
Subject: Re: Help getting IP30/Octane fixed?
From: Kumba <>
Date: Tue, 19 May 2009 03:12:20 -0400
Cc: Linux MIPS List <>
In-reply-to: <>
Original-recipient: rfc822;
References: <> <> <> <>
User-agent: Thunderbird (Windows/20090302)
Johannes Dickgreber wrote:

i think i found the problem

try booting with a command line       cca=5

the system is setting _page_cachable_default with what is found in the
processor register at booting time which is 3 ( _CACHE_CACHABLE_NONCOHERENT )
i think this can not work on a SMP System.

with the above overriding i have a working SMP Octane system.

        cca = 5  means _CACHE_CACHABLE_COHERENT

if time permits i send patches

Tried this and the change to HEART_IMR on my end using a dual R10000 195MHz module. It didn't boot in any of the cases.

Joshua Kinard

"The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between."

--Emperor Turhan, Centauri Republic

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