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[PATCH] -mr10k-cache-barrier=store

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH] -mr10k-cache-barrier=store
From: peter fuerst <post@pfrst.de>
Date: Sun, 17 May 2009 23:49:45 +0200 (CEST)
Cc: linux-mips@linux-mips.org
Original-recipient: rfc822;linux-mips@linux-mips.org
Reply-to: post@pfrst.de
Sender: linux-mips-bounce@linux-mips.org

Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.
(Accordingly i extended the patches for older GCC-releases to accept
both styles)


Signed-off-by: peter fuerst <post@pfrst.de>


--- git/arch/mips/Makefile      Thu May 14 12:50:28 2009
+++ wrk/arch/mips/Makefile      Sun May 17 23:14:10 2009
@@ -473,12 +473,12 @@
 # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
 #
 ifdef CONFIG_SGI_IP28
-  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n)
-      $(error gcc doesn't support needed option -mr10k-cache-barrier=1)
+  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
+      $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
   endif
 endif
 core-$(CONFIG_SGI_IP28)                += arch/mips/sgi-ip22/
-cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=1 
-I$(srctree)/arch/mips/include/asm/mach-ip28
+cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=store 
-I$(srctree)/arch/mips/include/asm/mach-ip28
 load-$(CONFIG_SGI_IP28)                += 0xa800000020004000

 #

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