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Re: "RT_PREEMPT for loongson" is updated to patch-2.6.29.1-rt8

To: Zhang Le <r0bertz@gentoo.org>
Subject: Re: "RT_PREEMPT for loongson" is updated to patch-2.6.29.1-rt8
From: Wu Zhangjin <wuzhangjin@gmail.com>
Date: Mon, 20 Apr 2009 15:18:46 +0800
Cc: linux-kernel@vger.kernel.org, Nicholas Mc Guire <hofrat@hofr.at>, Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>, zhangfx@lemote.com, loongson-dev@googlegroups.com, yanh@lemote.com, Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org, linux-rt-users@vger.kernel.org
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In-reply-to: <20090420050419.GA22520@adriano.hkcable.com.hk>
Organization: DSLab, Lanzhou University, China
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1240193547.25532.52.camel@falcon> <20090420050419.GA22520@adriano.hkcable.com.hk>
Reply-to: wuzhangjin@gmail.com
Sender: linux-mips-bounce@linux-mips.org
On Mon, 2009-04-20 at 13:04 +0800, Zhang Le wrote:
> Hi, Zhangjin,
> 
> Ralf told me he has a ftrace implementation too.
> 
> 11:47 < Ralf> r0bertz: ftrace looks nice but not yet mergable yet.
> 11:47 < Ralf> r0bertz: I also have my own ftrace implementation which in some
> parts is better, in some is worse. 
> 11:47 < Ralf> r0bertz: So this is going to be quite a job.  
> 
> So I think you can talk to Ralf about how to get this merged, :)
> 

to Zhangle, 

thx very much for your info :-) 

hope Ralf can reply this E-mail and pull the source code from my git
tree:

git://dev.lemote.com/rt4ls.git

to Ralf, 

I have divided ftrace to several commits in the above git tree, hope you
can check it, thx :-) 

in addition to the static/dynamic/graph function tracer & system call
tracer implementation, a mips specific ring_buffer_time_stamp
(kernel/trace/ring_buffer.c) is also implemented to get 1us precision
time, this is very important to make ftrace available in mips,
otherwise, we can only get 1ms precision time for the original
ring_buffer_time_stamp is based on sched_clock(jiffies based). 

perhaps we can implement a more precise sched_clock directly, just as
x86 does(native_sched_clock, tsc based), but in mips, there is only a
32bit timer count which will quickly overflow, so it will need an extra
overflow protection, which may influence the other parts of the kernel.

best regards,
Wu Zhangjin


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