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Re: [PATCH 0/3] Alchemy: platform updates

To: Manuel Lauss <>
Subject: Re: [PATCH 0/3] Alchemy: platform updates
From: Florian Fainelli <>
Date: Mon, 30 Mar 2009 10:39:40 +0200
Cc: Kevin Hickey <>, Sergei Shtylyov <>, Linux-MIPS <>
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Hi Manuel, Kevin,

Le Sunday 29 March 2009 17:52:43 Manuel Lauss, vous avez écrit :
> On Sun, 29 Mar 2009 10:27:46 -0500
> Kevin Hickey <> wrote:
> > On Sun, 2009-03-29 at 17:03 +0400, Sergei Shtylyov wrote:
> > >   Single kernel binary? If it's at all possible, I am all for it.
> >
> > On some level, I agree but not at the expense of a larger kernel or
> > longer boot times.  Maybe I'm just not following how your implementation
> > works but it seems to me that runtime checks will add to boot time.
> > More importantly it adds to the kernel memory footprint as the tables of
> > constants for multiple CPUs will have to be compiled in.  If I'm
> > designing a board with an Au1250 in it, I don't care about the interrupt
> > numbers for Au1100 or Au1500.  This problem compounds when we introduce
> > Au1300 - several of its subsystems (like the interrupt controller) are
> > new requiring not only a new table of constants but a new object as
> > well.  In the desktop space I can understand this approach, but in the
> > embedded space it seems like an unnecessary resource burden.
> >
> > Please enlighten me :)
> You're right, from a single-cpu-board POV it doesn't make sense.
> However if you have a few boards which mostly differ in the Alchemy
> chip used (and not much else difference in board support code), I find
> this to be highly beneficial.  If I can have a single binary for the
> folks testing these boards, all the better!

I definitively agree, from a distribution point of view, that's even better.  
For instance Maxime did an excellent job with bcm63xx [1] which has both 
different base addresses for the SoC registers and even different offsets for 
the same things inside those registers. Resulting kernel is not that slower 
even though I do not have figures to show. Additionnaly you can still choose 
which BCM63xx SoC you are compiling for.

> Yes, increased binary size is to be expected, but I don't expect it to
> be in the megabyte range.
> I'm primarily doing this for company-internal purposes; I just thought
> I'd share the final result, maybe someone else might find it useful.

[1] :;a=blob;f=arch/mips/bcm63xx/cpu.c;h=0a403dd07cf48109c904486cc1106d99ce036aad;hb=30c20e2899bbf31069aee0bdc4258c211f7a3d0f
Best regards, Florian Fainelli
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