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[PATCH revised] MIPS: Enable prefetch option for VR5500 processor

To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Subject: [PATCH revised] MIPS: Enable prefetch option for VR5500 processor
From: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Date: Wed, 18 Mar 2009 09:04:01 +0900
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
In-reply-to: <49BFD438.3070805@ru.mvista.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <49ACF2EF.3080903@necel.com> <49BF4410.8080006@necel.com> <49BFD438.3070805@ru.mvista.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Thunderbird 2.0.0.19 (Windows/20081209)
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
Hi,

Sergei Shtylyov wrote:
    Why not:

         c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;

Thank you, patch revised.

 Shinya

arch/mips/mm/c-r4k.c |    2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b2..871e828 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
                c->dcache.ways = 2;
                c->dcache.waybit = 0;

-               c->options |= MIPS_CPU_CACHE_CDEX_P;
+               c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
                break;

        case CPU_TX49XX:

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