MIPS: Enable prefetch option for VR5500 processor

[Shinya Kuribayashi <shinya.kuribayashi@necel.com>]

MIPS: Enable prefetch option for VR5500 processor

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
Hi Ralf,

I haven't finished fixing up for VR5500 processor support, sigh :-(
I hope this is the last one, and don't miss anything essential.

 Shinya

arch/mips/mm/c-r4k.c |    1 +
1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b2..b42b9d2 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -781,6 +781,7 @@ static void __cpuinit probe_pcache(void)
                c->dcache.waybit = 0;

                c->options |= MIPS_CPU_CACHE_CDEX_P;
+               c->options |= MIPS_CPU_PREFETCH;
                break;

        case CPU_TX49XX: