Re: [PATCH][MIPS] Use CP0 Count register to implement more granular ndel

To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject:	Re: [PATCH][MIPS] Use CP0 Count register to implement more granular ndelay
From:	VomLehn <dvomlehn@cisco.com>
Date:	Fri, 13 Mar 2009 10:35:17 -0700
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Cc:	Linux MIPS Mailing List <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>
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On Fri, Mar 13, 2009 at 10:29:07AM +0100, Thomas Bogendoerfer wrote:
> On Wed, Mar 11, 2009 at 08:28:50PM -0700, VomLehn wrote:
> >  #
> > +# Collect various processors by instruction family
> > +#
> > +config MIPS1
> > +   bool
> > +   default y if CPU_R3000 || CPU_TX39XX
> > +
> > +config MIPS2
> > +   bool
> > +   default y if CPU_R6000
> > +
> > +config MIPS3
> > +   bool
> > +   default y if CPU_LOONGSON2 || CPU_R4300 || CPU_R4X00 || CPU_TX49XX || \
> > +           CPU_VR41XX
> > +
> > +config MIPS4
> > +   bool
> > +   default y if CPU_R8000 || CPU_R10000
> > +
> 
> what about all the R5k CPUs ?

Excellent question. What are their names and what is their ISA called?

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