| To: | VomLehn <dvomlehn@cisco.com> |
|---|---|
| Subject: | Re: [PATCH][MIPS] Use CP0 Count register to implement more granular ndelay |
| From: | tsbogend@alpha.franken.de (Thomas Bogendoerfer) |
| Date: | Fri, 13 Mar 2009 10:29:07 +0100 |
| Cc: | Linux MIPS Mailing List <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org> |
| In-reply-to: | <20090312032850.GA9379@cuplxvomd02.corp.sa.net> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20090312032850.GA9379@cuplxvomd02.corp.sa.net> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.13 (2006-08-11) |
On Wed, Mar 11, 2009 at 08:28:50PM -0700, VomLehn wrote: > # > +# Collect various processors by instruction family > +# > +config MIPS1 > + bool > + default y if CPU_R3000 || CPU_TX39XX > + > +config MIPS2 > + bool > + default y if CPU_R6000 > + > +config MIPS3 > + bool > + default y if CPU_LOONGSON2 || CPU_R4300 || CPU_R4X00 || CPU_TX49XX || \ > + CPU_VR41XX > + > +config MIPS4 > + bool > + default y if CPU_R8000 || CPU_R10000 > + what about all the R5k CPUs ? Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ] |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: [PATCH 1/2] dmaengine: TXx9 Soc DMA Controller driver, Atsushi Nemoto |
|---|---|
| Next by Date: | Re: [PATCH][MIPS] Use CP0 Count register to implement more granular ndelay, Ralf Baechle |
| Previous by Thread: | [PATCH][MIPS] Use CP0 Count register to implement more granular ndelay, VomLehn |
| Next by Thread: | Re: [PATCH][MIPS] Use CP0 Count register to implement more granular ndelay, Ralf Baechle |
| Indexes: | [Date] [Thread] [Top] [All Lists] |