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Re: Ingenic JZ4730 - illegal instruction

To: Nils Faerber <>
Subject: Re: Ingenic JZ4730 - illegal instruction
From: "Kevin D. Kissell" <>
Date: Mon, 09 Mar 2009 10:45:11 -0500
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Nils Faerber wrote:
Kevin D. Kissell schrieb:
Are you sure that the JZ_RISC section is in fact the version of those
functions that's being built into your kernel?
Well, there is CONFIG_JZRISC=y in the kernel .config and a
switch(current_cpu_type) { case CPU_JZRISC: ...} so I would assume it is
being used. But I will verify that the CONFIG_JZRISC=y is correctly
translated into a current_cpu_type.
Your assumption is reasonable.  But given that things aren't working, yes, it's good to verify.
Oh, one last question, in order to rule out the cache as bug-spot would
the kernel option "run uncached" "solve" the issue (and be darn slow)?
It would certainly solve the issue, and would *probably* result in a system that would be fully functional but slow.  Very high end and very low end systems can be rendered unusable by forcing uncached operation, but it's certainly worth a try.  Also, if your cache control logic supports both write-back and write-through operation, if you set the default cache "attribute" for kernel and page tables (which is essentially what you're doing under-the-hood when you configure for uncached operation) to write-through, that should cure the problems with copying text pages, but *not* those with re-using them, with less performance impact.  I'd be a little surprised if the Ingenic part offered both modes, though.


          Kevin K.
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