| To: | post@pfrst.de, Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: cacheflush system call-MIPS |
| From: | David Daney <ddaney@caviumnetworks.com> |
| Date: | Tue, 17 Feb 2009 09:06:32 -0800 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <Pine.LNX.4.58.0902150312460.459@Indigo2.Peter> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <f5a7b3810902100716t2658ce95t2dcc7f85634522@mail.gmail.com> <20090211131649.GA1365@linux-mips.org> <Pine.LNX.4.58.0902140002180.408@Indigo2.Peter> <20090213235603.GA32274@linux-mips.org> <Pine.LNX.4.58.0902150312460.459@Indigo2.Peter> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Thunderbird 2.0.0.19 (X11/20090105) |
peter fuerst wrote: Why does it need that flush?To prepare the update-area (in the Shadow-FB) for DMA to RE. And on systems where the root frame buffer is directly manipulated by the CPU, the video system is continually using DMA to refresh the display. A cache flush can be required to eliminate transient visual glitches. David Daney kind regards On Fri, 13 Feb 2009, Ralf Baechle wrote:Date: Fri, 13 Feb 2009 23:56:03 +0000 From: Ralf Baechle <ralf@linux-mips.org> To: peter fuerst <post@pfrst.de> Cc: naresh kamboju <naresh.kernel@gmail.com>, linux-mips@linux-mips.org Subject: Re: cacheflush system call-MIPS On Sat, Feb 14, 2009 at 12:50:46AM +0100, peter fuerst wrote:there is one more good reason to ... : the Impact Xserver needs to do a cacheflush(a,w,DCACHE) as part of the refresh-sequence. And hence requires a sys_cacheflush, let's say, more conforming to the man-page (or some disgusting new ioctl in the Impact kernel-driver to do an equivalent operation ;-)Why does it need that flush? Ralf |
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