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Re: memcpy and prefetch

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: memcpy and prefetch
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 29 Jan 2009 15:58:54 +0000
Cc: ddaney@caviumnetworks.com, msundius@cisco.com, linux-mips@linux-mips.org, dvomlehn@cisco.com, msundius@sundius.com
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References: <20090128103753.GC2234@linux-mips.org> <20090129.002850.118974677.anemo@mba.ocn.ne.jp> <20090128183047.GA1691@linux-mips.org> <20090129.213613.128618730.anemo@mba.ocn.ne.jp>
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On Thu, Jan 29, 2009 at 09:36:13PM +0900, Atsushi Nemoto wrote:

> On Wed, 28 Jan 2009 18:30:47 +0000, Ralf Baechle <ralf@linux-mips.org> wrote:
> > --- a/arch/mips/lib/memcpy.S
> > +++ b/arch/mips/lib/memcpy.S
> > @@ -21,7 +21,7 @@
> >   * end of memory on some systems.  It's also a seriously bad idea on non
> >   * dma-coherent systems.
> >   */
> > -#if !defined(CONFIG_DMA_COHERENT) || !defined(CONFIG_DMA_IP27)
> > +#ifdef CONFIG_DMA_NONCOHERENT
> >  #undef CONFIG_CPU_HAS_PREFETCH
> >  #endif
> >  #ifdef CONFIG_MIPS_MALTA
> 
> This makes IP27 (and all other coherent platforms) use prefetch.  Is
> prefetch OK for all of them?
> 
> I suppose memcpy_fromio() should not use PREFETCH, at least.

The idea here is that we have two issues with prefetching:

 o Prefetching beyond the end of the source or destination range on a
   in-coherent range might bring back stale values from a DMA I/O
   buffer resulting in data corruption.  Hardware DMA coherency will
   avoid this issue.

 o IP27 has full blown hardware coherency.  Historically CONFIG_DMA_COHERENT
   was not able to cope with something of the complexity of IP27, so
   there was a separate CONFIG_DMA_IP27 and the broken logic expression
   was meant to treat CONFIG_DMA_COHERENT and CONFIG_DMA_IP27 the same
   as for prefetching.

 o Prefetching beyond the end of physical memory can cause exceptions on
   some systems.  The Malta has this problem.

Thus no prefetching on Malta or non-coherent systems.

  Ralf

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