[PATCH 14/20] MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.

[David Daney <ddaney@caviumnetworks.com>]

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/include/asm/smp.h |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 0ff5b52..e6f419f 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -37,6 +37,9 @@ extern int __cpu_logical_map[NR_CPUS];
 
 #define SMP_RESCHEDULE_YOURSELF        0x1     /* XXX braindead */
 #define SMP_CALL_FUNCTION      0x2
+/* Octeon - Tell another core to flush its icache */
+#define SMP_ICACHE_FLUSH       0x4
+
 
 extern cpumask_t phys_cpu_present_map;
 #define cpu_possible_map       phys_cpu_present_map
-- 
1.5.6.5