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[PATCH 16/21] MIPS: Add Cavium OCTEON irq hazard in asmmacro.h.

To: linux-mips@linux-mips.org
Subject: [PATCH 16/21] MIPS: Add Cavium OCTEON irq hazard in asmmacro.h.
From: David Daney <ddaney@caviumnetworks.com>
Date: Wed, 3 Dec 2008 15:44:26 -0800
Cc: David Daney <ddaney@caviumnetworks.com>, Tomaso Paoletti <tpaoletti@caviumnetworks.com>
In-reply-to: <493718EA.40703@caviumnetworks.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <493718EA.40703@caviumnetworks.com>
Sender: linux-mips-bounce@linux-mips.org
Place irq_enable_hazard and irq_disable_hazard into asmmacro.h

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/include/asm/asmmacro.h |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 7a88175..5408149 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -35,6 +35,16 @@
        mtc0    \reg, CP0_TCSTATUS
        _ehb
        .endm
+#elif defined(CONFIG_CPU_CAVIUM_OCTEON)
+       .macro  local_irq_enable reg=t0
+       ei
+       irq_enable_hazard
+       .endm
+
+       .macro  local_irq_disable reg=t0
+       di
+       irq_disable_hazard
+       .endm
 #else
        .macro  local_irq_enable reg=t0
        mfc0    \reg, CP0_STATUS
-- 
1.5.6.5


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