|To:||David Daney <firstname.lastname@example.org>|
|Subject:||Re: [PATCH] New IDE/block driver for OCTEON SOC Compact Flash interface.|
|From:||Sergei Shtylyov <email@example.com>|
|Date:||Fri, 14 Nov 2008 03:15:24 +0300|
|Cc:||firstname.lastname@example.org, linux-mips <email@example.com>|
|User-agent:||Thunderbird 220.127.116.11 (Windows/20080914)|
Hello, I wrote:
As part of our efforts to get the Cavium OCTEON processor support merged (see: http://marc.info/?l=linux-mips&m=122600487218824), we have this CF driver for your consideration. Most OCTEON variants have *no* DMA or interrupt support on the CF interface so a simple bit-banging approach is taken. Although if DMA is available, we do take advantage of it. The register definitions are part of the chip support patch set mentioned above, and are not included here. At this point I would like to get feedback as to whether this is a good approach for the CF driver, or perhaps generate ideas about other possible approaches.It's totally unacceptable for drivers/ide/ as this is self-containeed driver no using IDE core for anything, so this can only fit well to drivers/block/.
I probably need to clarify that it will hardly be accepted into drivers/block/ as well, being a mere CF driver.
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