Re: [PATCH 18/29] MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.

[David Daney <ddaney@caviumnetworks.com>]

Sergei Shtylyov wrote:
> Hello.
>
> David Daney wrote:
>
> > > > Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
> > > > Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
> > > > Signed-off-by: David Daney <ddaney@caviumnetworks.com>
> > > > ---
> > > >  arch/mips/include/asm/smp.h |    3 +++
> > > >  1 files changed, 3 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
> > > > index 0ff5b52..e6f419f 100644
> > > > --- a/arch/mips/include/asm/smp.h
> > > > +++ b/arch/mips/include/asm/smp.h
> > > > @@ -37,6 +37,9 @@ extern int __cpu_logical_map[NR_CPUS];
> > > >  
> > > >  #define SMP_RESCHEDULE_YOURSELF    0x1    /* XXX braindead */
> > > >  #define SMP_CALL_FUNCTION    0x2
> > > > +/* Octeon - Tell another core to flush its icache */
> > > > +#define SMP_ICACHE_FLUSH    0x4
> > > > +
> > >   Sigh, again new macro without users...
> > The users are in 01/29 and 04/29, perhaps you missed them.
>    Using before defining? Cool. :-]
We are currently touching 82 files.  I think the patch set is bisectable 
for non-octeon targets.
If you would like me to move the Kconfig patch to the end, I can do 
that.  That way you wouldn't have any breakage for octeon if you were to 
only apply a subset of the patches.  Other than that, there are 
currently no plans to restructure this patch set to try to maintain 
rigorous define before use ordering.
David Daney