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Re: AU1000: SSI0 naming inconsistency

To: Martin Gebert <martin.gebert@alpha-bit.de>
Subject: Re: AU1000: SSI0 naming inconsistency
From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Date: Fri, 07 Nov 2008 01:50:44 +0300
Cc: linux-mips@linux-mips.org
In-reply-to: <4912CFA7.9000508@alpha-bit.de>
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Hello.

Martin Gebert wrote:

Working on a 2.6.22 kernel for a AU1100 board, I came across the
following inconsistency in register naming in
include/asm/mach-au1x00/au1000.h, which still exists in 2.6.27.4 (lines 1334-1389). There's no register SSI0_CONTROL, it should be named
SSI0_ENABLE, as it is for SSI1:

--8><--
#define SSI0_CONTROL               0xB1600100
  #define SSI_CONTROL_CD             (1<<1)
  #define SSI_CONTROL_E              (1<<0)

/* SSI1 */
[...]
#define SSI1_ENABLE                0xB1680100

[...]
#define SSI_ENABLE_CD               (1<<1)
#define SSI_ENABLE_E                (1<<0)
--><8--

As I'm not working on a current kernel repo I don't dare to provide a
patch. Would fixing this be desirable?

This seems to be a only top of iceberg as the SSI register bits are all defined twice in the arch/mips/include/asm/mach-au1x00/au1000.h. I wonder why gcc ignores macro redefinitions... Patch is welcome but be sure not to break the users of those macros (if there are any :-)...

Martin

WBR, Sergei



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