| To: | Christoph Hellwig <hch@lst.de> |
|---|---|
| Subject: | Re: [PATCH 06/36] Add Cavium OCTEON processor CSR definitions |
| From: | David Daney <ddaney@caviumnetworks.com> |
| Date: | Wed, 29 Oct 2008 12:18:47 -0700 |
| Cc: | linux-mips@linux-mips.org, Tomaso Paoletti <tpaoletti@caviumnetworks.com> |
| In-reply-to: | <20081029184552.GB32500@lst.de> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <490655B6.4030406@caviumnetworks.com> <1225152181-3221-1-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-2-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-3-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-4-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-5-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-6-git-send-email-ddaney@caviumnetworks.com> <20081029184552.GB32500@lst.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Thunderbird 2.0.0.16 (X11/20080723) |
Christoph Hellwig wrote: On Mon, Oct 27, 2008 at 05:02:38PM -0700, David Daney wrote:Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> --- .../cavium-octeon/executive/cvmx-csr-addresses.h | 8391 ++++++ arch/mips/cavium-octeon/executive/cvmx-csr-enums.h | 86 + .../cavium-octeon/executive/cvmx-csr-typedefs.h |27517 ++++++++++++++++++++27517 lines in a header and it's all junk? I'm glad you asked. No it is not all junk. That file contains the bit definitions for all on-chip registers.We are interested in transforming this information into a form suitable for inclusion in the kernel. Any specific suggestions as to improve the patch will be considered. Several possibilities are:1) Don't typedef all the unions in cvmx-csr-typedefs.h. An rename the file so it doesn't contain the reprehensible word 'typedef' 2) Break cvmx-csr-addresses.h and cvmx-csr-typedefs.h into several parts, one for each functional block in the processor. There are obviously other options as well... Thanks, David Daney |
| Previous by Date: | Re: [PATCH 00/36] Add Cavium OCTEON processor support (v2)., Maciej W. Rozycki |
|---|---|
| Next by Date: | Re: [PATCH 15/36] Probe for Cavium OCTEON CPUs., Maciej W. Rozycki |
| Previous by Thread: | Re: [PATCH 06/36] Add Cavium OCTEON processor CSR definitions, Christoph Hellwig |
| Next by Thread: | Re: [PATCH 06/36] Add Cavium OCTEON processor CSR definitions, Christoph Hellwig |
| Indexes: | [Date] [Thread] [Top] [All Lists] |