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Re: [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-cavium-octeon
From: David Daney <ddaney@caviumnetworks.com>
Date: Tue, 28 Oct 2008 16:51:34 -0700
Cc: linux-mips@linux-mips.org, Tomaso Paoletti <tpaoletti@caviumnetworks.com>, Paul Gortmaker <Paul.Gortmaker@windriver.com>
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Ralf Baechle wrote:
On Mon, Oct 27, 2008 at 05:02:34PM -0700, David Daney wrote:

+#ifdef CONFIG_SMP
+#define cpu_has_llsc           1
+#else
+/* Disable LL/SC on non SMP systems. It is faster to disable interrupts for
+   atomic access than a LL/SC */
+#define cpu_has_llsc           0
+#endif

It also means the resulting kernel won't have support for futex which
essentially means you're cut off from modern libcs.

It is possible to get this to work - but nobody bothered so far; ll/sc-less
R2000 class processors are very rare these days.  My recommendation is
to keep cpu_has_llsc as 1 until you've fixed up the futex implementation,
if you deciede so.

Someone should tell ip32 w/ R5000 this.  It seems that it is broken too.

This could explain why my R5000 O2 does weird things with glibc 2.8...

David Daney

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