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Re: [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE
From: Chad Reese <kreese@caviumnetworks.com>
Date: Tue, 28 Oct 2008 09:13:44 -0700
Cc: Ralf Baechle <ralf@linux-mips.org>, David Daney <ddaney@caviumnetworks.com>, linux-mips@linux-mips.org, Tomaso Paoletti <tpaoletti@caviumnetworks.com>
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References: <1225152181-3221-2-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-3-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-4-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-5-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-6-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-7-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-8-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-9-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-10-git-send-email-ddaney@caviumnetworks.com> <1225152181-3221-11-git-send-email-ddaney@caviumnetworks.com> <20081028095655.GB18610@linux-mips.org> <alpine.LFD.1.10.0810281604250.27396@ftp.linux-mips.org>
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Maciej W. Rozycki wrote:
> On Tue, 28 Oct 2008, Ralf Baechle wrote:
> 
>> Another thing I noticed is that we don't use write_c0_ebase(), so the
>> firmware better setup this correctly or we crash and burn.  We better
>> should initialize that right ...
> 
>  Well, your version still does not do it...
> 
>   Maciej

From an Octeon perspective, we'd prefer that the kernel not touch ebase
as we set it in the bootloader. The bootloader sets the proper value
based on the number of kernels being loaded and which cores the kernel
is loaded on. This allows some interesting things, like running 16
kernels each on a different CPU. Although 16 kernels is just a toy
project, we have a number of customers that run two kernels. They choose
which cores the kernels run on dynamically at boot time.

Chad


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