| To: | "Maciej W. Rozycki" <macro@linux-mips.org> |
|---|---|
| Subject: | Re: [PATCH 11/37] Cavium OCTEON: ebase isn't just CAC_BASE |
| From: | David Daney <ddaney@caviumnetworks.com> |
| Date: | Fri, 24 Oct 2008 13:12:28 -0700 |
| Cc: | linux-mips@linux-mips.org, Tomaso Paoletti <tpaoletti@caviumnetworks.com> |
| In-reply-to: | <alpine.LFD.1.10.0810242054420.31223@ftp.linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1224809821-5532-1-git-send-email-ddaney@caviumnetworks.com> <1224809821-5532-12-git-send-email-ddaney@caviumnetworks.com> <alpine.LFD.1.10.0810242054420.31223@ftp.linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Thunderbird 2.0.0.16 (X11/20080723) |
Maciej W. Rozycki wrote: On Thu, 23 Oct 2008, ddaney@caviumnetworks.com wrote:From: David Daney <ddaney@caviumnetworks.com> On Cavium, the ebase isn't just CAC_BASE, but also the part of read_c0_ebase() too.How is that unique to CONFIG_CPU_CAVIUM_OCTEON? That's a general feature of the MIPS revision 2 architecture, so please make it right from the beginning. You'll avoid an ugly #ifdef this way too. Thanks for the feedback. We will submit a patch that uses the runtime value of mipsr2 to do the adjustment. David Daney |
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