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[PATCH 28/37] Cavium OCTEON FPU EMU exception as TLB exception

To: linux-mips@linux-mips.org
Subject: [PATCH 28/37] Cavium OCTEON FPU EMU exception as TLB exception
From: ddaney@caviumnetworks.com
Date: Thu, 23 Oct 2008 17:56:52 -0700
Cc: David Daney <ddaney@caviumnetworks.com>, Tomaso Paoletti <tpaoletti@caviumnetworks.com>, Paul Gortmaker <Paul.Gortmaker@windriver.com>
In-reply-to: <1224809821-5532-1-git-send-email-ddaney@caviumnetworks.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1224809821-5532-1-git-send-email-ddaney@caviumnetworks.com>
Sender: linux-mips-bounce@linux-mips.org
From: David Daney <ddaney@caviumnetworks.com>

The FPU exceptions come in as TLB exceptions -- see if this is
one of them, and act accordingly.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/mm/fault.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index fa636fc..9ce503a 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -47,6 +47,21 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned 
long write,
               field, regs->cp0_epc);
 #endif
 
+#ifdef CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED
+       /*
+        * Normally the FPU emulator uses a load word from address one
+        * to retake control of the CPU after executing the
+        * instruction in the delay slot of an emulated branch. The
+        * Octeon hardware unaligned access fix changes this from an
+        * address exception into a TLB exception. This code checks to
+        * see if this page fault was caused by an FPU emulation.
+        *
+        * Terminate if exception was recognized as a delay slot return */
+       extern int do_dsemulret(struct pt_regs *);
+       if (do_dsemulret(regs))
+               return;
+#endif
+
        info.si_code = SEGV_MAPERR;
 
        /*
-- 
1.5.5.1


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