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Question about rdhwr emulation.

To: linux-mips@linux-mips.org
Subject: Question about rdhwr emulation.
From: David Daney <ddaney@caviumnetworks.com>
Date: Tue, 21 Oct 2008 18:03:39 -0700
Original-recipient: rfc822;linux-mips@linux-mips.org
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I was looking at the rdhwr emulation code in genex.S and wondering about the 
following:

If cpu_has_vtag_icache is true we run handle_ri_rdhwr_vivt() instead of 
handle_ri_rdhwr().

And handle_ri_rdhwr_vivt() probes the tlb to see if the faulting instruction 
can be reached through the TLB, if it can the 'fast path' is taken, otherwise 
the 'slow path'.

Why is this probe of the TLB necessary?  Or perhaps more concisely under which 
conditions can I set cpu_has_vtag_icache to false (noting that for our cpu this 
is the only place cpu_has_vtag_icache is tested)?

Thanks in advance for enlightening me,
David Daney

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