| To: | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
|---|---|
| Subject: | Re: [PATCH 1/2] ide: Add tx4939ide driver |
| From: | Tejun Heo <htejun@gmail.com> |
| Date: | Sun, 28 Sep 2008 07:09:35 +0900 |
| Cc: | Atsushi Nemoto <anemo@mba.ocn.ne.jp>, sshtylyov@ru.mvista.com, linux-mips@linux-mips.org, linux-ide@vger.kernel.org, ralf@linux-mips.org, Jens Axboe <jens.axboe@oracle.com>, James Bottomley <James.Bottomley@HansenPartnership.com> |
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| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <48C851ED.4090607@ru.mvista.com> <48CA8BEE.1090305@ru.mvista.com> <20080913.005904.07457691.anemo@mba.ocn.ne.jp> <200809271819.19510.bzolnier@gmail.com> |
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Bartlomiej Zolnierkiewicz wrote: > On Friday 12 September 2008, Atsushi Nemoto wrote: >> On Fri, 12 Sep 2008 19:34:06 +0400, Sergei Shtylyov >> <sshtylyov@ru.mvista.com> wrote: > > [...] > >>>>>> + __ide_flush_dcache_range((unsigned long)addr, size); >>>>> Why is this needed BTW? >>>> Do you mean __ide_flush_dcache_range? This is needed to avoid cache >>>> inconsistency on PIO drive. PIO transfer only writes to cache but >>>> upper layers expects the data is in main memory. >>> Hum, then I wonder why it's MIPS specific... >> SPARC also have it. And there were some discussions for ARM IIRC. > > I was under the impression that it has been addressed by Tejun at > the higher-layer level (for both ide/libata) long time ago and that > MIPS/SPARC code are just a left-overs which could be removed now? cc'ing Jens and James. IIRC, I posted several patches but they never went in. I don't remember what the objections were or whether any alternative fix went in. Thanks. -- tejun |
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