| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | page_write_back infinite wait (porting to Mips 4kec SoC) |
| From: | "Luigi 'Comio' Mantellini" <luigi.mantellini.ml@gmail.com> |
| Date: | Tue, 23 Sep 2008 14:09:44 +0200 |
| Dkim-signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:reply-to:organization:to :subject:date:user-agent:x-face:mime-version:content-type :content-transfer-encoding:content-disposition:message-id; bh=x/P2SOq+EEi8Dfdtb5xifQhLezO+bF92vv04j5uqGEk=; b=Mg8LR0XjX9tl1T+D+Md3HX67cCf9lC8hF8hfU1M3xOk6rhcDTIyciujnkA8Pe5jkzY G0aBxqi/kujl1syg3qYsjg2jgFEoQOtcQ7UnQ7pN2ju0SpAUvrtJjJtsKPj67YV75PiM /4L6f6eZQOVibC7xYIb8CTS/njoXCkGPavfAA= |
| Domainkey-signature: | a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:reply-to:organization:to:subject:date:user-agent:x-face :mime-version:content-type:content-transfer-encoding :content-disposition:message-id; b=aF6kaIp4wCyIVIeejQkywLMchBBWKj2TEmkV0KSgNHsoK6jkzbojimoKrp1P9xdphY J8KIX9pfLrSliyvKWV09pFW1x4et/Ii73PHUR37nzbuu+K4PZHXuA2V5xn6+B52p7xKo Dhm65aj1bnO3fCFq1itzALrVLj59AZQVdTCNM= |
| Organization: | Industrie Dial Face S.p.A. |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Reply-to: | luigi.mantellini.ml@gmail.com |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | KMail/1.10.1 (Linux/2.6.24-21-generic; KDE/4.1.1; i686; ; ) |
Hi List, I'm working on a 4Kec SoC. I'm trying to port a recent kernel (2.6.26-rcX from trunk) to my SoC but I have problem on timers (i think). The start sequence (start_kernel @init/main.c) freezes on the page_writeback_init() call. The page_writeback_init function calls the lock_timer_base function (by means the mod_timer/__mod_timer) that fails always the test likely(base!=NULL) (source file kernel/timer.c). The base variable (ponter to tvec_base) is always NULL, resulting an infinite loop. I'm using the cevt-r4t and csrc-4k standard mips 4k timer (on irq #7). With debugger I verified that the c0_compare_interrupt service routine is correctly invoked. Kindly, can anyone help me to understand what I need to check to solve this issue? If you need other information, please, ask me (This is my first mips port). Thanks in advance. best regards. luigi -- Luigi Mantellini R&D - Software Industrie Dial Face S.p.A. Via Canzo, 4 20068 Peschiera Borromeo (MI), Italy Tel.: +39 02 5167 2813 Fax: +39 02 5167 2459 Email: luigi.mantellini@idf-hit.com |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | [Patch 6/6] MIPS: Ptrace support for HARDWARE_WATCHPOINTS, David Daney |
|---|---|
| Next by Date: | Re: mmap is broken for MIPS64 n32 and o32 abis, Maciej W. Rozycki |
| Previous by Thread: | Patch 0/6] MIPS: Hardware watch register support for gdb (version 5)., David Daney |
| Next by Thread: | [PATCH] Fixed the definition of PTRS_PER_PGD, jack . tan |
| Indexes: | [Date] [Thread] [Top] [All Lists] |