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Re: MIPS checksum bug

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: MIPS checksum bug
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sat, 20 Sep 2008 02:13:44 +0200
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>, u1@terran.org, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.55.0809191656030.29711@cliff.in.clinika.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20080917.222350.41199051.anemo@mba.ocn.ne.jp> <BD7F24AB-4B0C-4FA4-ADB3-5A86E7A4624F@terran.org> <20080919.011704.59652451.anemo@mba.ocn.ne.jp> <20080920.004319.93205397.anemo@mba.ocn.ne.jp> <Pine.LNX.4.55.0809191656030.29711@cliff.in.clinika.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.18 (2008-05-17)
On Fri, Sep 19, 2008 at 05:09:17PM +0100, Maciej W. Rozycki wrote:

> > @@ -229,6 +239,9 @@ LEAF(csum_partial)
> >  
> >     /* Still a full word to go  */
> >     ulw     t1, (src)
> > +#ifdef USE_DOUBLE
> > +   add     t1, zero        /* clear upper 32bit */
> > +#endif
> >     PTR_ADDIU       src, 4
> >     ADDC(sum, t1)
> >  
> 
>  Unfortunately you can't zero-extend with a single instruction (you can
> use a single sll(v) to sign-extend), unless the R2 ISA provides some
> suitable oddity (which I haven't checked).  You want something like:
> 
>       dsll32  t1, t1, 0
>       dsrl32  t1, t1, 0
> 
> instead.

For a one's complement checksum it doesn't matter in which of the 4
halfwords the data ends is loaded.  So the easiest solution is:

        /* Still a full word to go  */
        ulw     t1, (src)
#ifdef USE_DOUBLE
        dsll    t1, t1, 32              /* clear lower 32bit */
#endif
        PTR_ADDIU       src, 4
        ADDC(sum, t1)

  Ralf

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