| To: | u1@terran.org |
|---|---|
| Subject: | Re: MIPS checksum bug |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Fri, 19 Sep 2008 01:17:04 +0900 (JST) |
| Cc: | macro@linux-mips.org, linux-mips@linux-mips.org |
| In-reply-to: | <BD7F24AB-4B0C-4FA4-ADB3-5A86E7A4624F@terran.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <Pine.LNX.4.55.0809171104290.17103@cliff.in.clinika.pl> <20080917.222350.41199051.anemo@mba.ocn.ne.jp> <BD7F24AB-4B0C-4FA4-ADB3-5A86E7A4624F@terran.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Wed, 17 Sep 2008 15:52:45 -0700, Bryan Phillippe <u1@terran.org> wrote: > I tested the simplified patch below (ADDC32), and it does not address > the checksum bug. I suspect the problem is that we're still leaving > the carry bit in the upper 16 bits of the 32 bit csum returned, and > this is resulting in a computed checksum that is 1 greater than it > should be. The upper 16 bits of the return value of this function > must be 0, right? Thank you for testing. Though this patch did not fixed your problem, I still have a doubt on 64-bit optimization. If your hardware could run 32-bit kernel, could you confirm the problem can happens in 32-bit too or not? --- Atsushi Nemoto |
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