linux-mips
[Top] [All Lists]

Re: [PATCH 2/6] TXx9: Microoptimize interrupt handlers

To: sshtylyov@ru.mvista.com
Subject: Re: [PATCH 2/6] TXx9: Microoptimize interrupt handlers
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Thu, 04 Sep 2008 00:52:49 +0900 (JST)
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
In-reply-to: <48BE6346.4070207@ru.mvista.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1220275361-5001-2-git-send-email-anemo@mba.ocn.ne.jp> <48BE6346.4070207@ru.mvista.com>
Sender: linux-mips-bounce@linux-mips.org
On Wed, 03 Sep 2008 14:13:26 +0400, Sergei Shtylyov <sshtylyov@ru.mvista.com> 
wrote:
> > The IOC interrupt status register on RBTX49XX only have 8 bits.  Use
> > 8-bit version of __fls() to optimize interrupt handlers.
> >   
> 
>    But doesn't the patch also change the result of 
> toshiba_rbtx49{27|38}_irq_nested() if the register reads back as 0?

Yes, now _irq_nested() returns -1 if no interrupts, and it will be
counted as spurious interrupts.  I think this is a little bonus ;)

---
Atsushi Nemoto

<Prev in Thread] Current Thread [Next in Thread>