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Re: [PATCH] e100: Add missing dma sync for proper operation with non-coh

To: David Acker <dacker@roinet.com>
Subject: Re: [PATCH] e100: Add missing dma sync for proper operation with non-coherent caches.
From: David Daney <ddaney@avtrex.com>
Date: Tue, 26 Aug 2008 12:24:31 -0700
Cc: e1000-devel@lists.sourceforge.net, netdev@vger.kernel.org, linux-mips <linux-mips@linux-mips.org>
In-reply-to: <48B45065.5050907@roinet.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <48B3A8D0.2040108@avtrex.com> <48B45065.5050907@roinet.com>
Sender: linux-mips-bounce@linux-mips.org
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David Acker wrote:
David Daney wrote:

diff --git a/drivers/net/e100.c b/drivers/net/e100.c
index 19d32a2..fb8d551 100644
--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -1840,6 +1840,11 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx, if (readb(&nic->csr->scb.status) & rus_no_res)
                 nic->ru_running = RU_SUSPENDED;
+        /* We are done looking at the buffer.  Prepare it for
+         * more DMA.  */
+        pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
+                           sizeof(struct rfd),
+                           PCI_DMA_FROMDEVICE);
         return -ENODATA;
     }
Should the call to pci_dma_sync_single_for_device be DMA_TO_DEVICE since we are giving the memory back to the device?

No. We are giving the memory back to the device, but the direction of the data transfer is from the device to memory.

David Daney

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