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[PATCH 2/6] rb532: use physical addresses for gpio and device controller

To: "linux-mips" <linux-mips@linux-mips.org>
Subject: [PATCH 2/6] rb532: use physical addresses for gpio and device controller registers
From: Florian Fainelli <florian@openwrt.org>
Date: Fri, 22 Aug 2008 00:14:27 +0200
Cc: ralf@linux-mips.org
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
This patch fixes the misuse of virtual address which would lead to
serious problems while accessing ioremap'd registers in the GPIO
code.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 00a1c78..3d1632c 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -47,8 +47,8 @@ struct mpmc_device dev3;
 static struct resource rb532_gpio_reg0_res[] = {
        {
                .name   = "gpio_reg0",
-               .start  = (u32)(IDT434_REG_BASE + GPIOBASE),
-               .end    = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct 
rb532_gpio_reg)),
+               .start  = (REG_BASE + GPIOBASE),
+               .end    = (REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)),
                .flags  = IORESOURCE_MEM,
        }
 };
@@ -56,8 +56,8 @@ static struct resource rb532_gpio_reg0_res[] = {
 static struct resource rb532_dev3_ctl_res[] = {
        {
                .name   = "dev3_ctl",
-               .start  = (u32)(IDT434_REG_BASE + DEV3BASE),
-               .end    = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct 
dev_reg)),
+               .start  = (REG_BASE + DEV3BASE),
+               .end    = (REG_BASE + DEV3BASE + sizeof(struct dev_reg)),
                .flags  = IORESOURCE_MEM,
        }
 };
diff --git a/include/asm-mips/mach-rc32434/rb.h 
b/include/asm-mips/mach-rc32434/rb.h
index e0a76e3..f229da4 100644
--- a/include/asm-mips/mach-rc32434/rb.h
+++ b/include/asm-mips/mach-rc32434/rb.h
@@ -18,6 +18,7 @@
 #include <linux/genhd.h>
 
 #define IDT434_REG_BASE        ((volatile void *) KSEG1ADDR(0x18000000))
+#define REG_BASE       0x18000000
 #define DEV0BASE       0x010000
 #define DEV0MASK       0x010004
 #define DEV0C          0x010008
@@ -43,6 +44,7 @@
 #define GPIOISTAT      0x050010
 #define GPIONMIEN      0x050014
 #define IMASK6         0x038038
+
 #define LO_WPX         (1 << 0)
 #define LO_ALE         (1 << 1)
 #define LO_CLE         (1 << 2)

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