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[MIPS] msp71xx: resolve compilation problem in msp_setup.c

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [MIPS] msp71xx: resolve compilation problem in msp_setup.c
From: Shane McDonald <mcdonald.shane@gmail.com>
Date: Sun, 17 Aug 2008 11:51:48 -0600
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The msp71xx_defconfig has never compiled in a kernel release.  This is
because the file msp_setup.c relies on some definitions from the PMCMSP
GPIO driver, which has not yet been accepted into the kernel.
This patch checks for the existence of the PMCMSP GPIO driver;
if it doesn't exist, no GPIO functions are referenced.

This patch will continue to work after the GPIO driver has been accepted,
so no changes will be necessary when that happens.

Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
---
 arch/mips/pmc-sierra/msp71xx/msp_setup.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Note that this patch doesn't clean up all compilation problems with
the MSP71xx: there is still a problem with a multiple definition
of plat_timer_setup.  I'm trying to wrangle some hardware to sort
this out.  Note that removing the definition of plat_timer_setup
in msp_time.c allows the kernel to compile completely,
but I don't know if it will run.

diff -uprN orig/arch/mips/pmc-sierra/msp71xx/msp_setup.c 
patched/arch/mips/pmc-sierra/msp71xx/msp_setup.c
--- orig/arch/mips/pmc-sierra/msp71xx/msp_setup.c       2008-08-17 
10:15:11.000000000 -0600
+++ patched/arch/mips/pmc-sierra/msp71xx/msp_setup.c    2008-08-17 
10:15:48.000000000 -0600
@@ -19,7 +19,7 @@
 #include <msp_prom.h>
 #include <msp_regs.h>
 
-#if defined(CONFIG_PMC_MSP7120_GW)
+#if defined(CONFIG_PMC_MSP7120_GW) && defined(CONFIG_PMCMSP_GPIO)
 #include <msp_regops.h>
 #include <msp_gpio.h>
 #define MSP_BOARD_RESET_GPIO   9
@@ -79,7 +79,7 @@ void msp7120_reset(void)
        /* Wait a bit for the DDRC to settle */
        for (i = 0; i < 100000000; i++);
 
-#if defined(CONFIG_PMC_MSP7120_GW)
+#if defined(CONFIG_PMC_MSP7120_GW) && defined(CONFIG_PMCMSP_GPIO)
        /*
         * Set GPIO 9 HI, (tied to board reset logic)
         * GPIO 9 is the 4th GPIO of register 3

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