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[PATCH 3/3] txx9: Fix some sparse warnings

To: linux-mips@linux-mips.org
Subject: [PATCH 3/3] txx9: Fix some sparse warnings
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Sat, 19 Jul 2008 01:51:52 +0900 (JST)
Cc: ralf@linux-mips.org
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
 arch/mips/txx9/generic/setup.c |    2 ++
 include/asm-mips/txx9/tx3927.h |   19 ++++++++++---------
 2 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 3715a8f..8c60c78 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -19,7 +19,9 @@
 #include <linux/module.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/gpio.h>
 #include <asm/bootinfo.h>
+#include <asm/time.h>
 #include <asm/txx9/generic.h>
 #ifdef CONFIG_CPU_TX49XX
 #include <asm/txx9/tx4938.h>
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
index ca414c7..ea79e1b 100644
--- a/include/asm-mips/txx9/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -10,17 +10,18 @@
 
 #include <asm/txx9/txx927.h>
 
-#define TX3927_SDRAMC_REG      0xfffe8000
-#define TX3927_ROMC_REG                0xfffe9000
-#define TX3927_DMA_REG         0xfffeb000
-#define TX3927_IRC_REG         0xfffec000
-#define TX3927_PCIC_REG                0xfffed000
-#define TX3927_CCFG_REG                0xfffee000
+#define TX3927_REG_BASE        0xfffe0000UL
+#define TX3927_SDRAMC_REG      (TX3927_REG_BASE + 0x8000)
+#define TX3927_ROMC_REG                (TX3927_REG_BASE + 0x9000)
+#define TX3927_DMA_REG         (TX3927_REG_BASE + 0xb000)
+#define TX3927_IRC_REG         (TX3927_REG_BASE + 0xc000)
+#define TX3927_PCIC_REG                (TX3927_REG_BASE + 0xd000)
+#define TX3927_CCFG_REG                (TX3927_REG_BASE + 0xe000)
 #define TX3927_NR_TMR  3
-#define TX3927_TMR_REG(ch)     (0xfffef000 + (ch) * 0x100)
+#define TX3927_TMR_REG(ch)     (TX3927_REG_BASE + 0xf000 + (ch) * 0x100)
 #define TX3927_NR_SIO  2
-#define TX3927_SIO_REG(ch)     (0xfffef300 + (ch) * 0x100)
-#define TX3927_PIO_REG         0xfffef500
+#define TX3927_SIO_REG(ch)     (TX3927_REG_BASE + 0xf300 + (ch) * 0x100)
+#define TX3927_PIO_REG         (TX3927_REG_BASE + 0xf500)
 
 struct tx3927_sdramc_reg {
        volatile unsigned long cr[8];

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