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Re: Changing the treatment of the MIPS HI and LO registers

To: Maxim Kuvyrkov <maxim@codesourcery.com>
Subject: Re: Changing the treatment of the MIPS HI and LO registers
From: Richard Sandiford <rdsandiford@googlemail.com>
Date: Wed, 11 Jun 2008 19:54:17 +0100
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>, gcc-patches@gcc.gnu.org, linux-mips@linux-mips.org
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In-reply-to: <48501C55.5060602@codesourcery.com> (Maxim Kuvyrkov's message of "Wed\, 11 Jun 2008 22\:41\:25 +0400")
Mail-followup-to: Maxim Kuvyrkov <maxim@codesourcery.com>,"Maciej W. Rozycki" <macro@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>, gcc-patches@gcc.gnu.org, linux-mips@linux-mips.org, rdsandiford@googlemail.com
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Maxim Kuvyrkov <maxim@codesourcery.com> writes:
> GLIBC contains the following code in stdlib/longlong.h:
> <snip>
> #if defined (__mips__) && W_TYPE_SIZE == 32
> #define umul_ppmm(w1, w0, u, v) \
>    __asm__ ("multu %2,%3"                                             \
>          : "=l" ((USItype) (w0)),                                     \
>            "=h" ((USItype) (w1))                                      \
>          : "d" ((USItype) (u)),                                       \
>            "d" ((USItype) (v)))
> #define UMUL_TIME 10
> #define UDIV_TIME 100
> #endif /* __mips__ */
> </snip>
>
> What would be a correct fix in this case?  Something like this:
> <snip>
> #define umul_ppmm(w1, w0, u, v)                                       \
>    ({unsigned int __attribute__((mode(DI))) __xx;             \
>      __xx = (unsigned int __attribute__((mode(DI)))) u * v;   \
>      w0 = __xx & ((1 << 32) - 1);                             \
>      w1 = __xx >> 32;})
> </snip>
>
> Or is there a better way?

All being well, you should just be able to do the same as I did for
GCC's copy of longlong.h (included in the patch you responded to).

Richard

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