linux-mips
[Top] [All Lists]

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page
From: Ralf Baechle <ralf@linux-mips.org>
Date: Fri, 9 May 2008 09:49:26 +0100
Cc: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>, linux-mips <linux-mips@linux-mips.org>
In-reply-to: <Pine.LNX.4.55.0805080003120.31409@cliff.in.clinika.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20080507233815.e6de28da.yoichi_yuasa@tripeaks.co.jp> <Pine.LNX.4.55.0805071712520.25644@cliff.in.clinika.pl> <200805072238.m47MbxbZ022160@po-mbox303.hop.2iij.net> <Pine.LNX.4.55.0805080003120.31409@cliff.in.clinika.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.17 (2007-11-01)
On Thu, May 08, 2008 at 12:04:54AM +0100, Maciej W. Rozycki wrote:

> > >  Why would ever cache_line_size be zero in this place?  Are you trying to 
> > > support a cacheless CPU?  If not, it should be a BUG_ON().
> > > 
> > 
> > When CPU has no prefetch, no cache cdex_s and no caache cdex_p, 
> > cache_line_size is zero.
> > I confirmed it with Nevada(Cobalt server) and VR41xx.
> 
>  Fair enough.  I confused the variable with some others used to store the
> actual line size of each of the caches.  Your change is correct, thank you
> and sorry about the noise.

And I guess that means the variable should get a better name.

  Ralf

<Prev in Thread] Current Thread [Next in Thread>